DP Registers Detailed
Rasterizer Interface (DP)
The Reality Display Processor control interface is found at 0x04100000. The DP registers allow commands to be sent to the RDP and for RDP settings to be toggled. The RDP works in tandem with the Video Interface to allow for hardwaredrawn polygons. The RDP contains its own texture memory (4KB) from which it can texture rectangles or triangles. The RDP also has the capability of converting textures from other color modes as well as drawing shaded and zbuffered triangles. Under normal game operation, the RDP is usually controlled via the RSP as the drawing commands are very low level. However, it is possible to control the RDP directly from a running program on the N64 without coding a specialized program for the RSP. Sending a command to the RDP is done in a similar fashion to sending a DMA request to one of the DMA controllers onboard the N64.
The DP_START_REG register specifies the start location in RDRAM or RSP DMEM where an RDP command can be found. The RDP will pull the command from RDPAM or RSP DMEM depending on the state of the DMEM DMA bit in the DP_STATUS_REG register. When in RDRAM mode, the RDP can handle any valid address, but be careful as caching issues may arise with cached areas of RDRAM. When in RSP DMEM mode, the RDP expects the address to be in the range of 0x000 to 0xFFF. This is identical to the valid data memory range with respect to the RSP. This should be written to before the DP_END_REG.
The DP_END_REG register specifies the end location in RDRAM or RSP DMEM where an RDP command can be found. The same restrictions that apply to the range of addresses passed to DP_START_REG apply here as well. Writing to this register will kick off the process of loading a command from memory and performing it, so the DP_END_REG should be written to after the DP_START_REG. Commands should be issued one at a time from memory, not as a block of commands.
The DP_CURRENT_REG reflects the current location of the RDP in loading commands from memory.
The DP_STATUS_REG register allows arbitrary modes to be set on the RDP. Most notably, this is how one would tell the RDP from which processor to pull its data. The bits have different meaning depending on whether it is read from or written to as detailed below.
|DMEM DMA Status||0||This bit will be set if DMEM DMA mode is set. Use this bit to determine where the RDP will expect commands to come from.|
|Freeze Status||1||This bit will be set if Freeze has been set.|
|Flush Status||2||This bit will be set if Flush has been set.|
|TMEM Busy||4||This bit will be set if the TMEM is in use on the RDP.|
|Pipe Busy||5||This bit will be set if the graphics pipe is in use on the RDP.|
|Command Busy||6||This bit will be set if the RDP is currently executing a command.|
|Command Buffer Busy||7||This bit will be set if the RDP command buffer is in use.|
|DMA Busy||8||This bit will be set if the RDP command buffer is in use.|
|End Valid||9||Unknown. Normally set to zero.|
|Start Valid||10||Unknown. Normally set to zero.|
Possibly the only bits worth mentioning are the DMEM DMA Status, End Valid and Start Valid bits. The DMEM DMA bit indicates whether the RDP is in the correct mode to receive commands from the RDRAM. While the actual meaning of the End Valid and Start Valid bits is unknown, they are often used in commercial games to tell if it is safe to issue the next command. Before issuing any command to the RDP, check to see that both the Start Valid and End Valid bits are cleared. Waiting until these bits are both cleared before issuing another command ensures that the next command won’t overwhelm the RDP command buffer. Failing to do so could cause the N64 to freeze.
|Clear DMEM DMA
|0||Writing a 1 to this bit will set the RDP to pull commands from RDRAM.|
|Set DMEM DMA
|1||Writing a 1 to this bit will set the RDP to pull commands from the RSP DMEM.|
|Clear Freeze||2||Writing a 1 to this bit will clear the RDP freeze bit.|
|Set Freeze||3||Writing a 1 to this bit will set the RDP freeze bit.|
|Clear Flush||4||Writing a 1 to this bit will clear the RDP flush bit.|
|Set Flush||5||Writing a 1 to this bit will set the RDP flush bit.|
|Clear TMEM Counter||6||Writing a 1 to this bit will set the DP_TMEM_REG register to 0.|
|Clear Pipe Counter||7||Writing a 1 to this bit will set the DP_PIPEBUSY_REG register to 0.|
|Clear Command Counter||8||Writing a 1 to this bit will set the DP_BUFBUSY_REG register to 0.|
|Clear Clock Counter||9||Writing a 1 to this bit will set the DP_CLOCK_REG register to 0.|
The functionality of the DP_CLOCK_REG register is unknown. It can be reset using the DP_STATUS_REG.
The functionality of the DP_BUFBUSY_REG register is unknown. It can be reset using the DP_STATUS_REG, and counts up to a predetermined value.
The functionality of the DP_PIPEBUSY_REG register is unknown. It can be reset using the DP_STATUS_REG, and counts up to a predetermined value.
The functionality of the DP_TMEM_REG register is unknown. It can be reset using the DP_STATUS_REG, and counts up to a predetermined value.
Rasterizer Command Set
The rasterizer is controlled by a set of commands, most of them 64 bits in length. They can be split into three different categories: configuration, drawing and pipeline control. The RDP is capable of rasterizing rectangles (textured or untextured) and a variety of triangles. Coordinates of geometry to be rasterized are given with respect to a virtual frame buffer (also known as screen space) which is four times larger in width and height to the screen resolution. It is possible that this is controlled by the Pixel Advance bits in the VI_CONTROL_REG register but this is unverified.
All commands are presented with their common name, followed by the expected data format as passed to the RDP and finally a description of the command and its use. Illegal values for a particular command are highlighted in red.
These commands allow one to configure the RDP for various rasterization options as well as set up and load textures into TMEM.